cpu_id.cc 11 KB

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  1. /*
  2. * Copyright 2011 The LibYuv Project Authors. All rights reserved.
  3. *
  4. * Use of this source code is governed by a BSD-style license
  5. * that can be found in the LICENSE file in the root of the source
  6. * tree. An additional intellectual property rights grant can be found
  7. * in the file PATENTS. All contributing project authors may
  8. * be found in the AUTHORS file in the root of the source tree.
  9. */
  10. #include "libyuv/cpu_id.h"
  11. #if defined(_MSC_VER)
  12. #include <intrin.h> // For __cpuidex()
  13. #endif
  14. #if !defined(__pnacl__) && !defined(__CLR_VER) && \
  15. !defined(__native_client__) && (defined(_M_IX86) || defined(_M_X64)) && \
  16. defined(_MSC_FULL_VER) && (_MSC_FULL_VER >= 160040219)
  17. #include <immintrin.h> // For _xgetbv()
  18. #endif
  19. #if !defined(__native_client__)
  20. #include <stdlib.h> // For getenv()
  21. #endif
  22. // For ArmCpuCaps() but unittested on all platforms
  23. #include <stdio.h>
  24. #include <string.h>
  25. #include "libyuv/basic_types.h" // For CPU_X86
  26. #ifdef __cplusplus
  27. namespace libyuv {
  28. extern "C" {
  29. #endif
  30. // For functions that use the stack and have runtime checks for overflow,
  31. // use SAFEBUFFERS to avoid additional check.
  32. #if defined(_MSC_FULL_VER) && (_MSC_FULL_VER >= 160040219) && \
  33. !defined(__clang__)
  34. #define SAFEBUFFERS __declspec(safebuffers)
  35. #else
  36. #define SAFEBUFFERS
  37. #endif
  38. // cpu_info_ variable for SIMD instruction sets detected.
  39. LIBYUV_API int cpu_info_ = 0;
  40. // TODO(fbarchard): Consider using int for cpuid so casting is not needed.
  41. // Low level cpuid for X86.
  42. #if (defined(_M_IX86) || defined(_M_X64) || defined(__i386__) || \
  43. defined(__x86_64__)) && \
  44. !defined(__pnacl__) && !defined(__CLR_VER)
  45. LIBYUV_API
  46. void CpuId(int info_eax, int info_ecx, int* cpu_info) {
  47. #if defined(_MSC_VER)
  48. // Visual C version uses intrinsic or inline x86 assembly.
  49. #if defined(_MSC_FULL_VER) && (_MSC_FULL_VER >= 160040219)
  50. __cpuidex(cpu_info, info_eax, info_ecx);
  51. #elif defined(_M_IX86)
  52. __asm {
  53. mov eax, info_eax
  54. mov ecx, info_ecx
  55. mov edi, cpu_info
  56. cpuid
  57. mov [edi], eax
  58. mov [edi + 4], ebx
  59. mov [edi + 8], ecx
  60. mov [edi + 12], edx
  61. }
  62. #else // Visual C but not x86
  63. if (info_ecx == 0) {
  64. __cpuid(cpu_info, info_eax);
  65. } else {
  66. cpu_info[3] = cpu_info[2] = cpu_info[1] = cpu_info[0] = 0u;
  67. }
  68. #endif
  69. // GCC version uses inline x86 assembly.
  70. #else // defined(_MSC_VER)
  71. int info_ebx, info_edx;
  72. asm volatile(
  73. #if defined(__i386__) && defined(__PIC__)
  74. // Preserve ebx for fpic 32 bit.
  75. "mov %%ebx, %%edi \n"
  76. "cpuid \n"
  77. "xchg %%edi, %%ebx \n"
  78. : "=D"(info_ebx),
  79. #else
  80. "cpuid \n"
  81. : "=b"(info_ebx),
  82. #endif // defined( __i386__) && defined(__PIC__)
  83. "+a"(info_eax), "+c"(info_ecx), "=d"(info_edx));
  84. cpu_info[0] = info_eax;
  85. cpu_info[1] = info_ebx;
  86. cpu_info[2] = info_ecx;
  87. cpu_info[3] = info_edx;
  88. #endif // defined(_MSC_VER)
  89. }
  90. #else // (defined(_M_IX86) || defined(_M_X64) ...
  91. LIBYUV_API
  92. void CpuId(int eax, int ecx, int* cpu_info) {
  93. (void)eax;
  94. (void)ecx;
  95. cpu_info[0] = cpu_info[1] = cpu_info[2] = cpu_info[3] = 0;
  96. }
  97. #endif
  98. // For VS2010 and earlier emit can be used:
  99. // _asm _emit 0x0f _asm _emit 0x01 _asm _emit 0xd0 // For VS2010 and earlier.
  100. // __asm {
  101. // xor ecx, ecx // xcr 0
  102. // xgetbv
  103. // mov xcr0, eax
  104. // }
  105. // For VS2013 and earlier 32 bit, the _xgetbv(0) optimizer produces bad code.
  106. // https://code.google.com/p/libyuv/issues/detail?id=529
  107. #if defined(_M_IX86) && (_MSC_VER < 1900)
  108. #pragma optimize("g", off)
  109. #endif
  110. #if (defined(_M_IX86) || defined(_M_X64) || defined(__i386__) || \
  111. defined(__x86_64__)) && \
  112. !defined(__pnacl__) && !defined(__CLR_VER) && !defined(__native_client__)
  113. // X86 CPUs have xgetbv to detect OS saves high parts of ymm registers.
  114. int GetXCR0() {
  115. int xcr0 = 0;
  116. #if defined(_MSC_FULL_VER) && (_MSC_FULL_VER >= 160040219)
  117. xcr0 = (int)_xgetbv(0); // VS2010 SP1 required. NOLINT
  118. #elif defined(__i386__) || defined(__x86_64__)
  119. asm(".byte 0x0f, 0x01, 0xd0" : "=a"(xcr0) : "c"(0) : "%edx");
  120. #endif // defined(__i386__) || defined(__x86_64__)
  121. return xcr0;
  122. }
  123. #else
  124. // xgetbv unavailable to query for OSSave support. Return 0.
  125. #define GetXCR0() 0
  126. #endif // defined(_M_IX86) || defined(_M_X64) ..
  127. // Return optimization to previous setting.
  128. #if defined(_M_IX86) && (_MSC_VER < 1900)
  129. #pragma optimize("g", on)
  130. #endif
  131. // based on libvpx arm_cpudetect.c
  132. // For Arm, but public to allow testing on any CPU
  133. LIBYUV_API SAFEBUFFERS int ArmCpuCaps(const char* cpuinfo_name) {
  134. char cpuinfo_line[512];
  135. FILE* f = fopen(cpuinfo_name, "r");
  136. if (!f) {
  137. // Assume Neon if /proc/cpuinfo is unavailable.
  138. // This will occur for Chrome sandbox for Pepper or Render process.
  139. return kCpuHasNEON;
  140. }
  141. while (fgets(cpuinfo_line, sizeof(cpuinfo_line) - 1, f)) {
  142. if (memcmp(cpuinfo_line, "Features", 8) == 0) {
  143. char* p = strstr(cpuinfo_line, " neon");
  144. if (p && (p[5] == ' ' || p[5] == '\n')) {
  145. fclose(f);
  146. return kCpuHasNEON;
  147. }
  148. // aarch64 uses asimd for Neon.
  149. p = strstr(cpuinfo_line, " asimd");
  150. if (p) {
  151. fclose(f);
  152. return kCpuHasNEON;
  153. }
  154. }
  155. }
  156. fclose(f);
  157. return 0;
  158. }
  159. // TODO(fbarchard): Consider read_msa_ir().
  160. // TODO(fbarchard): Add unittest.
  161. LIBYUV_API SAFEBUFFERS int MipsCpuCaps(const char* cpuinfo_name,
  162. const char ase[]) {
  163. char cpuinfo_line[512];
  164. FILE* f = fopen(cpuinfo_name, "r");
  165. if (!f) {
  166. // ase enabled if /proc/cpuinfo is unavailable.
  167. if (strcmp(ase, " msa") == 0) {
  168. return kCpuHasMSA;
  169. }
  170. return kCpuHasDSPR2;
  171. }
  172. while (fgets(cpuinfo_line, sizeof(cpuinfo_line) - 1, f)) {
  173. if (memcmp(cpuinfo_line, "ASEs implemented", 16) == 0) {
  174. char* p = strstr(cpuinfo_line, ase);
  175. if (p) {
  176. fclose(f);
  177. if (strcmp(ase, " msa") == 0) {
  178. return kCpuHasMSA;
  179. }
  180. return kCpuHasDSPR2;
  181. }
  182. }
  183. }
  184. fclose(f);
  185. return 0;
  186. }
  187. // Test environment variable for disabling CPU features. Any non-zero value
  188. // to disable. Zero ignored to make it easy to set the variable on/off.
  189. #if !defined(__native_client__) && !defined(_M_ARM)
  190. static LIBYUV_BOOL TestEnv(const char* name) {
  191. const char* var = getenv(name);
  192. if (var) {
  193. if (var[0] != '0') {
  194. return LIBYUV_TRUE;
  195. }
  196. }
  197. return LIBYUV_FALSE;
  198. }
  199. #else // nacl does not support getenv().
  200. static LIBYUV_BOOL TestEnv(const char*) {
  201. return LIBYUV_FALSE;
  202. }
  203. #endif
  204. static SAFEBUFFERS int GetCpuFlags(void) {
  205. int cpu_info = 0;
  206. #if !defined(__pnacl__) && !defined(__CLR_VER) && defined(CPU_X86)
  207. int cpu_info0[4] = {0, 0, 0, 0};
  208. int cpu_info1[4] = {0, 0, 0, 0};
  209. int cpu_info7[4] = {0, 0, 0, 0};
  210. CpuId(0, 0, cpu_info0);
  211. CpuId(1, 0, cpu_info1);
  212. if (cpu_info0[0] >= 7) {
  213. CpuId(7, 0, cpu_info7);
  214. }
  215. cpu_info = kCpuHasX86 | ((cpu_info1[3] & 0x04000000) ? kCpuHasSSE2 : 0) |
  216. ((cpu_info1[2] & 0x00000200) ? kCpuHasSSSE3 : 0) |
  217. ((cpu_info1[2] & 0x00080000) ? kCpuHasSSE41 : 0) |
  218. ((cpu_info1[2] & 0x00100000) ? kCpuHasSSE42 : 0) |
  219. ((cpu_info7[1] & 0x00000200) ? kCpuHasERMS : 0);
  220. // AVX requires OS saves YMM registers.
  221. if (((cpu_info1[2] & 0x1c000000) == 0x1c000000) && // AVX and OSXSave
  222. ((GetXCR0() & 6) == 6)) { // Test OS saves YMM registers
  223. cpu_info |= kCpuHasAVX | ((cpu_info7[1] & 0x00000020) ? kCpuHasAVX2 : 0) |
  224. ((cpu_info1[2] & 0x00001000) ? kCpuHasFMA3 : 0) |
  225. ((cpu_info1[2] & 0x20000000) ? kCpuHasF16C : 0);
  226. // Detect AVX512bw
  227. if ((GetXCR0() & 0xe0) == 0xe0) {
  228. cpu_info |= (cpu_info7[1] & 0x40000000) ? kCpuHasAVX512BW : 0;
  229. cpu_info |= (cpu_info7[1] & 0x80000000) ? kCpuHasAVX512VL : 0;
  230. cpu_info |= (cpu_info7[2] & 0x00000002) ? kCpuHasAVX512VBMI : 0;
  231. cpu_info |= (cpu_info7[2] & 0x00000040) ? kCpuHasAVX512VBMI2 : 0;
  232. cpu_info |= (cpu_info7[2] & 0x00001000) ? kCpuHasAVX512VBITALG : 0;
  233. cpu_info |= (cpu_info7[2] & 0x00004000) ? kCpuHasAVX512VPOPCNTDQ : 0;
  234. cpu_info |= (cpu_info7[2] & 0x00000100) ? kCpuHasGFNI : 0;
  235. }
  236. }
  237. // TODO(fbarchard): Consider moving these to gtest
  238. // Environment variable overrides for testing.
  239. if (TestEnv("LIBYUV_DISABLE_X86")) {
  240. cpu_info &= ~kCpuHasX86;
  241. }
  242. if (TestEnv("LIBYUV_DISABLE_SSE2")) {
  243. cpu_info &= ~kCpuHasSSE2;
  244. }
  245. if (TestEnv("LIBYUV_DISABLE_SSSE3")) {
  246. cpu_info &= ~kCpuHasSSSE3;
  247. }
  248. if (TestEnv("LIBYUV_DISABLE_SSE41")) {
  249. cpu_info &= ~kCpuHasSSE41;
  250. }
  251. if (TestEnv("LIBYUV_DISABLE_SSE42")) {
  252. cpu_info &= ~kCpuHasSSE42;
  253. }
  254. if (TestEnv("LIBYUV_DISABLE_AVX")) {
  255. cpu_info &= ~kCpuHasAVX;
  256. }
  257. if (TestEnv("LIBYUV_DISABLE_AVX2")) {
  258. cpu_info &= ~kCpuHasAVX2;
  259. }
  260. if (TestEnv("LIBYUV_DISABLE_ERMS")) {
  261. cpu_info &= ~kCpuHasERMS;
  262. }
  263. if (TestEnv("LIBYUV_DISABLE_FMA3")) {
  264. cpu_info &= ~kCpuHasFMA3;
  265. }
  266. if (TestEnv("LIBYUV_DISABLE_F16C")) {
  267. cpu_info &= ~kCpuHasF16C;
  268. }
  269. if (TestEnv("LIBYUV_DISABLE_AVX512BW")) {
  270. cpu_info &= ~kCpuHasAVX512BW;
  271. }
  272. #endif
  273. #if defined(__mips__) && defined(__linux__)
  274. #if defined(__mips_dspr2)
  275. cpu_info |= kCpuHasDSPR2;
  276. #endif
  277. #if defined(__mips_msa)
  278. cpu_info = MipsCpuCaps("/proc/cpuinfo", " msa");
  279. #endif
  280. cpu_info |= kCpuHasMIPS;
  281. if (getenv("LIBYUV_DISABLE_DSPR2")) {
  282. cpu_info &= ~kCpuHasDSPR2;
  283. }
  284. if (getenv("LIBYUV_DISABLE_MSA")) {
  285. cpu_info &= ~kCpuHasMSA;
  286. }
  287. #endif
  288. #if defined(__arm__) || defined(__aarch64__)
  289. // gcc -mfpu=neon defines __ARM_NEON__
  290. // __ARM_NEON__ generates code that requires Neon. NaCL also requires Neon.
  291. // For Linux, /proc/cpuinfo can be tested but without that assume Neon.
  292. #if defined(__ARM_NEON__) || defined(__native_client__) || !defined(__linux__)
  293. cpu_info = kCpuHasNEON;
  294. // For aarch64(arm64), /proc/cpuinfo's feature is not complete, e.g. no neon
  295. // flag in it.
  296. // So for aarch64, neon enabling is hard coded here.
  297. #endif
  298. #if defined(__aarch64__)
  299. cpu_info = kCpuHasNEON;
  300. #else
  301. // Linux arm parse text file for neon detect.
  302. cpu_info = ArmCpuCaps("/proc/cpuinfo");
  303. #endif
  304. cpu_info |= kCpuHasARM;
  305. if (TestEnv("LIBYUV_DISABLE_NEON")) {
  306. cpu_info &= ~kCpuHasNEON;
  307. }
  308. #endif // __arm__
  309. if (TestEnv("LIBYUV_DISABLE_ASM")) {
  310. cpu_info = 0;
  311. }
  312. cpu_info |= kCpuInitialized;
  313. return cpu_info;
  314. }
  315. // Note that use of this function is not thread safe.
  316. LIBYUV_API
  317. int MaskCpuFlags(int enable_flags) {
  318. int cpu_info = GetCpuFlags() & enable_flags;
  319. #ifdef __ATOMIC_RELAXED
  320. __atomic_store_n(&cpu_info_, cpu_info, __ATOMIC_RELAXED);
  321. #else
  322. cpu_info_ = cpu_info;
  323. #endif
  324. return cpu_info;
  325. }
  326. LIBYUV_API
  327. int InitCpuFlags(void) {
  328. return MaskCpuFlags(-1);
  329. }
  330. #ifdef __cplusplus
  331. } // extern "C"
  332. } // namespace libyuv
  333. #endif